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  Synopsys DC-T培训
   入.学.要.求

        学员学习本课程应具备下列基础知识:
        ◆ 电路系统的基本概念。

   班.级.规.模.及.环.境
       为了保证培训效果,增加互动环节,我们坚持小班授课,每期报名人数限5人,多余人员安排到下一期进行。
   上课时间和地点
上课地点:【上海】:同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【深圳分部】:深圳大学成教院/ 电影大厦(地铁一号线大剧院站)【北京分部】:福鑫大楼/北京中山学院 【武汉分部】:佳源大厦(高新二路) 【南京分部】:金港大厦(和燕路) 【成都分部】:领馆区1号(中和大道)
最近开课时间(连续班/周末班/晚班)
Synopsys DC-T培训:2025年5月1日....--即将开课----即将开课,请咨询客服。
   学时
     ◆课时: 共6天,36学时

        ◆外地学员:代理安排食宿(需提前预定)
        ☆合格学员免费颁发相关资格证书,提升您的职业资质
        作为最早专注于嵌入式培训的专业机构,曙海嵌入式学院提供的证书得到本行业的广泛认
        可,学员的能力得到大家的认同

        ☆合格学员免费推荐工作
        ★实验设备请点击这儿查看★
   .最.新.优.惠.
       ◆团体报名优惠措施:两人95折优惠,三人或三人以上9折优惠 。注意:在读学生凭学生证,即使一个人也优惠500元。
   .质.量.保.障.

        1、培训过程中,如有部分内容理解不透或消化不好,可免费在以后培训班中重听;
        2、培训结束后,培训老师留给学员手机和Email,免费提供半年的技术支持,充分保证培训后出效果;
        3、培训合格学员可享受免费推荐就业机会。 ☆合格学员免费颁发相关工程师等资格证书,提升您的职业资质。专注高端培训13年,曙海提供的证书得到本行业的广泛认可,学员的能力得到大家的认同,受到用人单位的广泛赞誉。

  Synopsys DC-T培训
培训方式以讲课和实验穿插进行

课.程.描.述 :

?

Overview

This workshop familiarizes you with the physical constraints that enable the strong DC-T correlation with physical tools. Through a combination of class lecture and hands-on labs, you will learn what the physical constraints are, how to load them into DC-T, how to view them, and how to verify they are complete and correct.

As part of the set up and run methodology, you will generate scripts using the Reference Methodology Script Generator (RMgen), and will adapt them to your design.

This workshop covers typical flows (flat, both with and without a floorplan, and hierarchical). It describes how the power and test flows fit into the DC-T flows. It covers methodologies that are common across all flows.

This workshop shows you how to setup for, analyze, and handle congestion, using text reports to quantify the congestion, and using the GUI to qualify it.

?

Objectives

At the end of this workshop the student should be able to:

  • Load the physical input files to DC-T and list the actions to be taken on them
  • Configure and generate RMgen “seed scripts” ,??and adapt those scripts to your design
  • Understand three frequently-used DC-T flows:

·???Classic flat with Power and Test with a floorplan

·???Classic flat with Power and Test without a floorplan

·??Hierarchical

  • Use methodologies common to all flows
  • Navigate the GUI to explore a floorplan
  • Set up for the most accurate congestion analysis
  • Analyze congestion using both text and GUI
  • Recommend congestion fixes

Audience Profile

Engineers familiar with Design Compiler using wire load models.

Prerequisites

To benefit the most from the material presented in this workshop, students should:

●?Have taken the Design Compiler 1 Workshop

Course Outline

Unit 1

·??Physical Elements

·??Set up and Run

·??Common Flows

·??Congestion

Unit 2

???DC Synthesis and optimization techniques, questions and answers